1
The payload: successors packed into spare bits
A region's payload is a set of k slots, each a signed delta-VPN (in region
units) plus a small confidence counter. The production layout is 4 slots of an 18-bit delta
and a 2-bit counter — 80 bits, sized to the spare bits across one page-table cache line.
The payload is a PayloadWord (256 bits) that travels with a
translation and is read/written through the page table via
readPayloadBits / writePayloadBits.
2
Learning: the table writes successors into the predecessor
On a transition src → curr, TRAIL computes the signed delta and updates the
source region's payload — bumping a matching slot or evicting the lowest-confidence
one — then writes it back into the page table. Next time that predecessor is walked, the
successor is already there.
3
Reading the payload prefetches the next one
On the walk, TRAIL decodes the demand region's slots and, for each confident delta, issues a
transparent walk for region + Δ. Crucially, the predicted region's
payload is enqueued at depth+1 — so TRAIL follows the successor of the successor, running
ahead down the chain up to max_prefetch_depth.
Each transparent walk (PTWTransparent) restores the caller's clock,
so demand-path timing is never charged for a prediction.
4
Predictions land in the L2 TLB via a prefetch queue
Each prediction returns with a completion timestamp and waits in a timestamp-ordered queue
(capped at the PQ size). When the demand clock passes that time, the entry is
allocated into the L2 TLB, tagged as a prefetch, and the prefetcher is told its guess
is now resident.
A later demand for that region hits the installed entry — a pq_hit —
and skips the walk entirely. That saved walk is the payoff.
5
Two homes for the payload
The successors can ride in the spare bits of the PTE (v4-trail), or live
in a separate OS-managed radix side-car table (v4-trail-sidecar) fetched
in parallel with the walk. The side-car never slows translation — it only shifts
when a prediction becomes available.
v4-trail
In-PTE payload
Rides in spare page-table bits, read inline during the walk. No extra structure; bounded
by the ~80-bit spare-bit budget.
v4-trail-sidecar
OS radix side-car
Payload in a separate table with its own walk cache, fetched in parallel. Frees the PTE
and widens the budget, at the cost of a parallel lookup.